True.
False.
True or False: An I/O device may contain its own CPU and memory components.
Section 5.1 IO Devices
Start by reading the I/O devices chapter, section 36.1. Key takeaway: There are multiple levels of "busses", with difference performance characteristics. Memory/Graphics/General IO.
Read sections 36.2 and 36.3 which describe the so-called canonical device.
Practice 5.1.1.
Practice 5.1.2.
Practice 5.1.3.
What are the downsides of the programmed I/O protocol discussed in this section?
- There is a lot of wasted CPU cycles as the CPU polls the device until it is not busy.
- It is simple.
- It is slow.
Read section 36.4 about using interrupts to avoid the CPU-waiting overhead.
Practice 5.1.4.
Read section 36.5 about efficient data movement using Direct-Memory-Access (DMA).
Practice 5.1.5.
What does DMA allow us to do?
- We can copy the needed data to/from the device while our CPU is doing something else.
- We can carry out multiple reads/writes on a device at the same time.
- We can copy the data to the device quicker.
Read section 36.6 about methods of interacting with a device. In particular understand the memory-mapped IO approach.
Read section 36.7 about device drivers.
Skim the remaining sections.
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